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  ? semiconductor components industries, llc, 2013 february, 2013 ? rev. 1 1 publication order number: ntlus4930n/d ntlus4930n power mosfet 30 v, 6.1 a, single n ? channel, 2.0x2.0x0.55 mm  cool  udfn6 package features ? udfn package with exposed drain pads for excellent thermal conduction ? low profile udfn 2.0 x 2.0 x 0.55 mm for board space saving ? low r ds(on) to minimize conduction losses ? low capacitance to minimize driver losses ? optimized gate charge to minimize switching losses ? these devices are pb ? free, halogen free/bfr free and are rohs compliant applications ? battery switch ? power load switch ? dc ? dc converters maximum ratings (t j = 25 c unless otherwise stated) parameter symbol value unit drain-to-source voltage v dss 30 v gate-to-source voltage v gs 20 v continuous drain current (note 1) continuous drain current (note 1) steady state t a = 25 c i d 6.1 a t a = 85 c 4.4 t 5 s t a = 25 c 9.3 power dissipa- tion (note 1) steady state t a = 25 c p d 1.65 w t 5 s t a = 25 c 3.8 continuous drain current (note 2) steady state t a = 25 c i d 3.8 a t a = 85 c 2.8 power dissipation (note 2) t a = 25 c p d 0.65 w pulsed drain current tp = 10  s i dm 19 a mosfet operating junction and storage temperature t j , t stg -55 to 150 c source current (body diode) (note 1) i s 1.65 a lead temperature for soldering purposes (1/8 from case for 10 s) t l 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. surface mounted on fr4 board using 1 in sq pad size (cu area = 1.127 in sq [2 oz] including traces). 2. surface-mounted on fr4 board using the minimum recommended pad size of 30 mm 2 , 2 oz. cu. http://onsemi.com n ? channel mosfet 30 v 28.5 m  @ 10 v 36 m  @ 4.5 v r ds(on) max i d max v (br)dss mosfet udfn6 (  cool  ) case 517bg see detailed ordering and shipping information in the package dimensions sect ion on page 3 of this data sheet. ordering information ad = specific device code m = date code  = pb ? free package ad m   1 marking diagram (top view) (*note: microdot may be in either location) 6.1 a d s g pin connections 5.5 a pin 1 d s 1 2 3 6 5 4 d d s d d g d s
ntlus4930n http://onsemi.com 2 thermal resistance ratings parameter symbol max unit junction-to-ambient ? steady state (note 3) r ja 75.7 c/w junction-to-ambient ? t 5 s (note 3) r ja 32.9 junction-to-ambient ? steady state min pad (note 4) r ja 191.4 3. surface-mounted on fr4 board using 1 in sq pad size (cu area = 1.127 in sq [2 oz] including traces). 4. surface-mounted on fr4 board using the minimum recommended pad size of 30 mm 2 , 2 oz. cu. electrical characteristics (t j = 25 c unless otherwise specified) parameter symbol test condition min typ max units off characteristics drain-to-source breakdown voltage v (br)dss v gs = 0 v, i d = 250  a 30 v drain-to-source breakdown voltage temperature coefficient v (br)dss /t j i d = 250  a, ref to 25 c +16 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 24 v t j = 25 c 1.0  a gate-to-source leakage current i gss v ds = 0 v, v gs = 20 v 10  a on characteristics (note 5) gate threshold voltage v gs(th) v gs = v ds , i d = 250  a 1.2 1.8 2.2 v negative threshold temp. coefficient v gs(th) /t j 4.4 mv/ c drain-to-source on resistance r ds(on) v gs = 10 v, i d = 6.1 a 19 28.5 m  v gs = 4.5 v, i d = 5.5 a 27 36 forward transconductance g fs v ds = 1.5 v, i d = 6.0 a 16 s charges, capacitances & gate resistance input capacitance c iss v gs = 0 v, f = 1 mhz, v ds = 15 v 476 pf output capacitance c oss 197 reverse transfer capacitance c rss 100 total gate charge q g(tot) v gs = 4.5 v, v ds = 15 v; i d = 5.5 a 4.8 nc threshold gate charge q g(th) 0.4 gate-to-source charge q gs 1.54 gate-to-drain charge q gd 2.15 q g(tot) v gs = 10 v, v ds = 15 v; i d = 5.5 a 8.7 nc switching characteristics, vgs = 4.5 v (note 6) turn-on delay time t d(on) v gs = 4.5 v, v dd = 15 v, i d = 5.5 a, r g = 3  8.7 ns rise time t r 14.4 turn-off delay time t d(off) 9.1 fall time t f 3.3 switching characteristics, vgs = 10 v (note 6) turn-on delay time t d(on) v gs = 10 v, v dd = 15 v, i d = 6.1 a, r g = 3  4.1 ns rise time t r 12.2 turn-off delay time t d(off) 11.6 fall time t f 2.2 drain-source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 1.65 a t j = 25 c 0.80 1.0 v t j = 125 c 0.67 5. pulse test: pulse width 300  s, duty cycle 2%. 6. switching characteristics are independent of operating junction temperatures.
ntlus4930n http://onsemi.com 3 electrical characteristics (t j = 25 c unless otherwise specified) parameter units max typ min test condition symbol drain-source diode characteristics reverse recovery time t rr v gs = 0 v, dis/dt = 100 a/  s, i s = 3.3 a 14.6 ns charge time t a 6.8 discharge time t b 7.8 reverse recovery charge q rr 5.4 nc 5. pulse test: pulse width 300  s, duty cycle 2%. 6. switching characteristics are independent of operating junction temperatures. device ordering information device package shipping ? ntlus4930ntag udfn6 (pb ? free) 3000 / tape & reel ntlus4930ntbg udfn6 (pb ? free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ntlus4930n http://onsemi.com 4 typical characteristics figure 1. on ? region characteristics figure 2. transfer characteristics v ds , drain ? to ? source voltage (v) v gs , gate ? to ? source voltage (v) 4 3 2 1 0 0 2 4 6 10 14 18 20 5 4 3 2 1 0 0 2 4 8 10 12 figure 3. on ? resistance vs. gate ? to ? source voltage figure 4. on ? resistance vs. drain current and gate voltage v gs , gate voltage (v) i d , drain current (a) 9.5 8.5 6.5 7.5 5.5 4.5 3.5 0.018 0.022 0.026 0.034 0.038 9 8 6 5 4 0.010 0.014 0.020 0.032 figure 5. on ? resistance variation with temperature figure 6. drain ? to ? source leakage current vs. voltage t j , junction temperature ( c) v ds , drain ? to ? source voltage (v) 125 100 75 50 25 0 ? 25 ? 50 0.7 0.8 0.9 1.1 1.2 1.3 1.4 1.6 30 20 15 10 5 1 1000 10,000 i d , drain current (a) i d , drain current (a) r ds(on) , drain ? to ? source resistance (  ) r ds(on) , normalized drain ? to ? source resistance (  ) i dss , leakage (na) 5 8 12 16 v ds = 5 v 6 14 20 t j = 25 c t j = ? 55 c t j = 125 c 0.030 i d = 6 a 710 r ds(on) , drain ? to ? source resistance (  ) 0.024 t j = 25 c v gs = 10 v v gs = 10 v i d = 6 a 150 1.0 1.5 t j = 150 c t j = 125 c 0.042 25 2.8 v 3.0 v 3.2 v 3.4 v 3.6 v v gs = 2.6 v 3.8 v 4.0 v to 10 v 16 18 v gs = 4.5 v 0.012 0.016 0.018 0.022 0.030 0.026 0.028 100 10 v gs = 0 v t j = 25 c
ntlus4930n http://onsemi.com 5 typical characteristics figure 7. capacitance variation figure 8. gate ? to ? source and drain ? to ? source voltage vs. total charge v ds , drain ? to ? source voltage (v) 25 20 15 10 5 0 0 100 300 400 600 700 figure 9. resistive switching time variation vs. gate resistance figure 10. diode forward voltage vs. current r g , gate resistance (  ) v sd , source ? to ? drain voltage (v) 100 10 1 0.1 10 100 1.1 1.0 0.8 0.6 0.5 0.4 0 20 figure 11. maximum rated forward biased safe operating area v ds , drain ? to ? source voltage (v) 10 1 0.1 0.01 0.01 0.1 10 100 c, capacitance (pf) t, time (ns) i s , source current (a) i d , drain current (a) 30 v gs = 0 v t j = 25 c c iss c oss c rss v gs = 10 v v dd = 15 v i d = 6 a t d(off) t d(on) t f t r t j = 25 c v gs = 0 v t j = 125 c 1 100 1 q g , total gate charge (nc) 12 10 6 4 2 0 0 2 4 6 8 10 v gs , gate ? to ? source voltage (v) 8 v gs = 10 v v dd = 15 v i d = 6 a t j = 25 c q t q gs q gd 10 200 500 0.7 0.9 2 4 6 8 12 14 16 18 0 v < v gs < 10 v r ds(on) limit thermal limit package limit 10  s 100  s 1 ms 10 ms dc
ntlus4930n http://onsemi.com 6 typical characteristics figure 12. fet thermal response t, time (s) 1e ? 02 1e ? 03 1e ? 04 1e ? 05 1e ? 06 0 0.1 0.2 0.4 0.5 0.6 0.7 r(t), effective transient thermal response (normalized) 0.3 1.1 1e ? 01 1e+00 1e+01 1e+02 1e+03 single pulse duty cycle = 0.5 0.2 0.1 0.05 0.02 0.01 0.8 0.9 1.0
ntlus4930n http://onsemi.com 7 package dimensions notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30 mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. 5. center terminal lead is optional. center terminal is connected to terminal lead # 4. 6. leads 1, 2, 5 and 6 are tied to the flag. c seating plane d b e 0.10 c a3 a a1 0.10 c udfn6 2x2, 0.65p case 517bg ? 01 issue a dim a min max millimeters 0.45 0.55 a1 0.00 0.05 a3 0.13 ref b 0.25 0.35 b1 0.65 bsc d d2 e e2 0.27 bsc e 0.15 ref k l pin one reference 0.08 c 0.10 c note 4 a 0.10 c note 3 l e d2 e2 b b 3 6 6x 1 k 4 6x 0.05 c j j1 a 0.10 c b1 b 0.05 c l2 note 5 l2 j j1 0.51 0.61 2.00 bsc 1.00 1.20 2.00 bsc 1.10 1.30 0.65 bsc 0.20 0.30 0.20 0.30 bottom view mounting footprint* recommended dimensions: millimeters l1 detail a l optional constructions ?? ?? 6x 0.43 2.30 1.10 0.66 1.25 0.65 pitch 6x 0.35 1 package outline 0.35 0.34 0.60 l1 --- 0.10 top view detail b side view detail a a *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. on semiconductor and are registered trademar ks of semiconductor components industries, llc (s cillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to an y products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of th e application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products ar e not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associ ated with such unintended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action em ployer. this literature is subject to all applicable copyrig ht laws and is not fo r resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ntlus4930n/d  cool is a trademark of semiconductor components industries, llc (scillc). literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loca l sales representative


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